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Colloquia

IBM POWER Architecture and Systems

Balaram Sinharoy
IBM

Thursday, October 27, 2005
JEC 3117 - 4:00 p.m. to 5:00 p.m.
Refreshments at 3:30 p.m.

Abstract:

Over the last several years IBM has been developing the POWER5 processor for use in the p-series and i-series systems. In this talk, we will describe the details of the POWER5 Processor and System. We will go over the details of its architecture, simultaneous multi-threading technology, dynamic power management and performance characteristics that focus on HPC and Commercial applications. We will also talk about the future roadmap of POWER and IBM's advanced research project in computer architecture, named PERCS, that focuses on optimizing the overall computing environment encompassing software and hardware. PERCS is partially funded by DARPA and focuses on IBM's POWER architecture.

Bio:

Dr. Balaram Sinharoy is a Distinguished Engineer in the IBM Systems and Technology Group. He has been the Chief Scientist for the IBM POWER5 processor design. He is currently leading PERCS microarchitecture, which is an advanced research and development project in IBM, funded partially by DARPA and done in collaboration with a number of University partners. His research and development interests include advanced microprocessor and system design. He has numerous patents and publications in these areas. He received the IBM Corporate Award, Outstanding Innovation Achievement Award and Outstanding Technical Achievement Award for his contribution to POWER4 and POWER5 microprocessors and has been named an IBM Master Inventor. He obtained his Ph.D. degree in Computer Science from Rensselaer Polytechnic Institute and received the 1992 Robert McNaughton Award. He is currently a senior member of IEEE.

Hosted by: Boleslaw Szymanski (x2714)

Last updated: October 13, 2005